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Scott Dattalo says:

The ambiguities were:

1) Do the rotate instructions really affect the Z bit? Yes they do. This is different than the 12 and 14 bit cores. So be careful when you port your c74 code over.

2) What happens if an indirect register is the object of indirect? For example:

    lfsr indf0,0     ;Load fsr0 with the address of indf0
    movf indf0,w     ;double indirection? Nah..

Like the 14-bit core, this will load W with zero regardless where indf is pointing. This is not too unexpected. But what about this:

    lfsr  indf1,0           ;load fsr0 with the address of indf1
    lfsr  indf0,2           ;load fsr2 with the address of indf0
    movff preinc0,postinc2  ;?

As I understand it, the first fetch will read zero because fsr0 is pointing to an indirect register (indf1). This zero is then written to the address that is contained fsr2. However, fsr2 points to an indirect register (indf0). Consequently the write is ignored.

3) I also had a question about whether the program memory addresses were always even. The answer is yes - even though all instructions are 16 bits wide. The reason is that the table reads and writes to program memory can occur on byte boundaries. Now if you look at the instruction set closely you'll notice that the least significant bit of the program counter is never used EXCEPT for the table reads and writes. Examine the offsets for the branch instructions for example.


file: /Techref/microchip/18diff.htm, 1KB, , updated: 2003/5/14 15:25, local time: 2024/4/17 12:02,

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